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    ORT8850L-1BM680C 参数 Datasheet PDF下载

    ORT8850L-1BM680C图片预览
    型号： ORT8850L-1BM680C
    PDF下载： 下载PDF文件 查看货源
    内容描述： 现场可编程系统芯片（ FPSC ）八通道x 850 Mb / s的背板收发器 [Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver]
    分类和应用： 现场可编程门阵列可编程逻辑时钟
    文件页数/大小： 105 页 / 1285 K
    品牌： LATTICE [ LATTICE SEMICONDUCTOR ]
     浏览型号ORT8850L-1BM680C的Datasheet PDF文件第1页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第3页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第4页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第5页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第6页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第7页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第8页浏览型号ORT8850L-1BM680C的Datasheet PDF文件第9页  
    Lattice Semiconductor
    ORCA ORT8850 Data Sheet
    Package Thermal Characteristics Summary............ 100
    qJA .............................................................. 100
    YJC ............................................................. 100
    qJC.............................................................. 100
    qJB .............................................................. 100
    FPSC Maximum Junction Temperature ...... 101
    Package Thermal Characteristics ............... 101
    Heat Sink Information.................................. 101
    Package Coplanarity ................................... 101
    Package Parasitics................................................... 102
    Package Outline Diagrams ...................................... 102
    Terms and Definitions ................................. 102
    Package Outline Drawings.......................... 103
    Ordering Information ................................................ 104
    Revision History ....................................................... 105
    Table of Contents
    Introduction .................................................................. 1
    Table of Contents......................................................... 2
    Features ....................................................................... 3
    Embedded Core Features............................... 3
    FPGA Features ............................................... 4
    Programmable Logic System Features........... 5
    Description ................................................................... 6
    What is an FPSC?........................................... 6
    FPSC Overview............................................... 6
    ispLEVER Development System..................... 7
    FPSC Design Kit ............................................. 7
    FPGA Logic Overview..................................... 8
    System-Level Features ................................... 9
    Configuration................................................. 10
    Additional Information ................................... 10
    ORT8850 Overview ................................................... 11
    Embedded Core Overview ............................ 11
    SONET Logic Blocks - Overview .................. 12
    System Considerations for Reference Clock
    Distribution.............................................. 15
    SONET Bypass Mode ................................... 16
    STM Macrocells - Overview .......................... 17
    HSI Macrocell - Overview.............................. 19
    Supervisory and Test Support Features - Over-
    view ........................................................ 19
    Protection Switching - Overview ................... 21
    FPSC Configuration - Overview .................... 22
    Backplane Transceiver Core Detailed Description .... 25
    SONET Logic Blocks, Detailed Description .. 25
    Receive Path Logic ....................................... 34
    FPGA/Embedded Core Interface Signals .................. 47
    Clock and Data Timing at the FPGA/Embedded
    Core Interface - SONET Block ............... 49
    Powerdown Mode ......................................... 56
    Protection Switching...................................... 56
    Memory Map .............................................................. 57
    Registers Access and General Description... 57
    Electrical Characteristics............................................ 69
    Absolute Maximum Ratings .......................... 69
    Recommended Operating Conditions ........................ 69
    Power Supply Decoupling LC Circuit ............ 70
    HSI Electrical and Timing Characteristics ..... 71
    Embedded Core LVDS I/O............................ 73
    Pin Information ........................................................... 77
    Package Pinouts ........................................................ 82
    2

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