欢迎访问ic37.com |
会员登录 免费注册
发布采购

BQ3285LFSS-A1 参数 Datasheet PDF下载

BQ3285LFSS-A1图片预览
型号: BQ3285LFSS-A1
PDF下载: 下载PDF文件 查看货源
内容描述: Y2K增强型实时时钟( RTC ) [Y2K-Enhanced Real-Time Clock (RTC)]
分类和应用: 计时器或实时时钟微控制器和处理器外围集成电路光电二极管
文件页数/大小: 22 页 / 148 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号BQ3285LFSS-A1的Datasheet PDF文件第1页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第2页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第3页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第5页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第6页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第7页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第8页浏览型号BQ3285LFSS-A1的Datasheet PDF文件第9页  
bq3285LF
RST
Reset input
The bq3285LF is reset when RST is pulled
low. When reset, INT becomes high impedance,
and the bq3285LF is not accessible. Table 4 in
the Control/Status Registers section lists the
register bits that are cleared by a reset.
Reset may be disabled by connecting RST to
V
CC
. This allows the control bits to retain
their states through power-down/power-up
cycles.
X1–X2
Crystal inputs
The X1–X2 inputs are provided for an exter-
nal 32.768kHz quartz crystal, Daiwa DT-26
or equivalent, with 6pF load capacitance. A
trimming capacitor may be necessary for
extremely precise time-base generation.
In the absence of a crystal, a 32.768kHz
waveform can be fed into the X1 input.
0
14 Bytes
13
14
114
Bytes
127
0
Storage
Registers
with
EXTRAM = 0
7F
00
00
0D
0E
Functional Description
Address Map
The bq3285LF provides 14 bytes of clock and con-
trol/status registers and 242 bytes of general nonvolatile
storage. Figure 1 illustrates the address map for the
bq3285LF.
Update Period
The update period for the bq3285LF is one second. The
bq3285LF updates the contents of the clock and calen-
dar locations during the update cycle at the end of each
update period (see Figure 2). The alarm flag bit may
also be set during the update cycle.
The bq3285LF copies the local register updates into the
user buffer accessed by the host processor. When a 1 is
written to the update transfer inhibit bit (UTI) in regis-
ter B, the user copy of the clock and calendar bytes re-
0
1
2
3
4
5
6
7
8
Seconds
Minutes
Minutes Alarm
Hours
Hours Alarm
Day of Week
Date of Month
Month
Year
Register A
Register B
Register C
Day of Month
Alarm
00
Clock and
Control Status
Registers
Seconds Alarm 01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
BCD
or
Binary
Format
126
Bytes
Storage
Registers
with
EXTRAM = 1
9
10
11
12
125
2
Bytes
126
127
Index
Registers
7D
7E
7F
13
Standard Index Register
Extended Index Register
plus Century bit
FG3285ID.eps
Figure 1. Address Map
Update Period
(1 sec.)
UIP
t
UC
(Update Cycle)
t
BUC
TD3285e1.eps
Figure 2. Update Period Timing and UIP
4