64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Timing Diagrams
Figure 33:
READ Burst Suspend
t
CLK
V
IH
CLK
V
IL
t
SP
t
HD
VALID
ADDRESS
V
IH
A[21:0]
V
IL
V
IH
ADV#
V
IL
VALID
ADDRESS
t
SP
t
HD
t
CEM
t
CBPH
t
HZ
CE#
V
IL
V
IH
t
CSP
t
OHZ
t
OHZ
V
IH
OE#
V
IL
V
IH
WE#
V
IL
V
IH
LB#/UB#
V
IL
V
OH
WAIT
V
OL
High-Z
V
OH
DQ[15:0]
V
OL
High-Z
t
ACLK
t
SP
t
HD
t
SP
t
HD
t
BOE
t
OLZ
t
KOH
VALID
OUTPUT
VALID
OUTPUT
VALID
OUTPUT
VALID
OUTPUT
t
OLZ
t
BOE
VALID
OUTPUT
VALID
OUTPUT
High-Z
DON’T CARE
UNDEFINED
Notes: 1. Non-default BCR settings for READ burst suspend: Latency code two (three clocks); WAIT
active LOW; WAIT asserted during delay.
2. Clock rates below 50 MHz (
t
CLK > 20ns) are allowed as long as
t
CSP specifications are met.
Table 25:
Burst READ Timing Parameters – Burst Suspend
-708
-706/-856
Min
Max
11
20
5
8
20
20
15
5
8
20
20
Units
ns
ns
ns
µs
ns
ns
Symbol
t
-708
Min
2
8
2
8
5
3
Max
-706/-856
Min
2
8
2
8
5
3
Max
Units
ns
ns
ns
ns
ns
ns
Symbol
t
Min
Max
9
20
ACLK
t
BOE
t
CBPH
t
CEM
t
CLK
t
CSP
HD
t
HZ
t
KOH
t
OHZ
t
5
12.5
4.5
OLZ
t
SP
PDF: 09005aef80be1fbd/Source: 09005aef80be2036
Burst CellularRAM_2.fm - Rev. G 10/05 EN
44
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©2003 Micron Technology, Inc. All rights reserved.
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