64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Timing Diagrams
Figure 35:
CE#-Controlled Asynchronous WRITE
tWC
A[21:0]
V
IH
V
IL
tAS
VALID ADDRESS
tAW
tWR
V
IH
ADV#
V
IL
tCW
tCPH
CE#
V
IH
V
IL
tBW
V
IH
LB#/UB#
V
IL
OE#
V
IH
V
IL
tWPH
tWP
V
IH
WE#
V
IL
tDW
tDH
DQ[15:0]
IN
V
IH
V
IL
tLZ
High-Z
VALID INPUT
tWHZ
DQ[15:0]
OUT
V
OH
V
OL
V
IH
V
IL
High-Z
tCEW
tHZ
High-Z
WAIT
DON’T CARE
Table 27:
Asynchronous WRITE Timing Parameters – CE#-Controlled
-70x
-856
Min
0
85
85
1
5
85
0
23
Max
Units
�½σ
ns
ns
ns
ns
ns
ns
ns
Symbol
t
HZ
t
LZ
t
WC
t
-70x
Min
10
70
8
46
10
0
55
10
0
Max
8
10
85
-856
Min
Max
8
Units
ns
ns
ns
ns
ns
ns
ns
Symbol
t
AS
t
AW
t
BW
t
Min
0
70
70
1
5
70
0
23
Max
CEW
t
CPH
t
CW
t
DH
t
DW
7.5
7.5
WHZ
t
WP
t
WPH
t
WR
8
PDF: 09005aef80be1fbd/Source: 09005aef80be2036
Burst CellularRAM_2.fm - Rev. G 10/05 EN
46
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©2003 Micron Technology, Inc. All rights reserved.
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