64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Timing Diagrams
Figure 41:
V
IH
CLK
V
IL
Burst WRITE Followed by Burst READ
tCLK
tSP tHD
tSP
tHD
V
IH
A[21:0]
V
IL
V
IH
V
IL
V
IH
V
IL
VALID
ADDRESS
VALID
ADDRESS
tSP tHD
ADV#
LB#/UB#
tSP tHD
tSP tHD
tCSP
V
IH
CE#
V
IL
tHD
tCBPH
2
tCSP
tABA
tOHZ
OE#
WE#
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
tSP tHD
tSP tHD
High-Z
tSP tHD
V
OH
WAIT
tBOE
tACLK
High-Z
tKOH
VALID
OUTPUT
VALID
OUTPUT
VALID
OUTPUT
VALID
OUTPUT
High-Z
DQ[15:0]
V
IH
IN/OUT
V
IL
High-Z
D[0]
D[1]
D[2]
D[3]
V
OL
DON’T CARE
UNDEFINED
Notes: 1. Non-default BCR settings for burst WRITE followed by burst READ: Latency code two
(three clocks); WAIT active LOW; WAIT asserted during delay.
2. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
vided every
t
CEM. A refresh opportunity is satisfied by either of the following two condi-
tions: a) clocked CE# HIGH, or b) CE# HIGH for greater than 15ns. Note that CellularRAM
Working Group 1.0 specification requires CE# to be clocked HIGH to terminate the burst.
3. Clock rates below 50 MHz (
t
CLK > 20ns) are allowed as long as
t
CSP specifications are met.
Table 33:
WRITE Timing Parameters – Burst WRITE Followed by Burst READ
-708
-706/-856
Min
5
15
5
Max
20
20
Units
ns
ns
ns
Symbol
t
t
-708
Min
2
3
Max
-706/-856
Min
2
3
Max
Units
ns
ns
Symbol
t
Min
5
12.5
4.5
Max
20
20
CBPH
t
CLK
t
CSP
HD
SP
Table 34:
READ Timing Parameters – Burst WRITE Followed by Burst READ
-708
-706/-856
Min
Max
56
11
20
20
20
Units
ns
ns
ns
ns
ns
Symbol
t
-708
Min
2
2
8
3
Max
-706/-856
Min
2
2
8
3
Max
Units
ns
ns
ns
ns
Symbol
t
Min
Max
46.5
9
20
20
20
ABA
t
ACLK
t
BOE
t
CLK
t
CSP
12.5
4.5
15
5
HD
t
KOH
t
OHZ
t
SP
PDF: 09005aef80be1fbd/Source: 09005aef80be2036
Burst CellularRAM_2.fm - Rev. G 10/05 EN
52
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc. All rights reserved.
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