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    EM6603 参数 Datasheet PDF下载

    EM6603图片预览
    型号： EM6603
    PDF下载： 下载PDF文件 查看货源
    内容描述： 超低功耗多I / O微控制器 [Ultra Low Power Multi I/O Microcontroller]
    分类和应用： 微控制器
    文件页数/大小： 39 页 / 670 K
    品牌： EMMICRO [ EM MICROELECTRONIC - MARIN SA ]
     浏览型号EM6603的Datasheet PDF文件第1页浏览型号EM6603的Datasheet PDF文件第2页浏览型号EM6603的Datasheet PDF文件第4页浏览型号EM6603的Datasheet PDF文件第5页浏览型号EM6603的Datasheet PDF文件第6页浏览型号EM6603的Datasheet PDF文件第7页浏览型号EM6603的Datasheet PDF文件第8页浏览型号EM6603的Datasheet PDF文件第9页  
    EM6603
    Table of Contents
    1
    OPERATING MODES
    1.1
    STANDBY M
    ODE
    1.2
    SLEEP MODE
    2
    POWER SUPPLY
    3
    RESET
    3.1
    O
    SCILLATION DETECTION CIRCUIT
    3.2
    R
    ESET
    P
    IN
    3.3
    I
    NPUT PORT
    (PA0..PA3) RESET
    3.4
    W
    ATCHDOG
    T
    IMER
    RESET
    3.5
    CPU S
    TATE AFTER
    RESET
    4
    OSCILLATOR
    4.1
    P
    RESCALER
    5
    WATCHDOG TIMER
    6
    INPUT AND OUTPUT PORTS
    6.1
    P
    ORT
    A
    6.2
    P
    ORT
    A
    REGISTERS
    6.3
    P
    ORT
    B
    6.4
    P
    ORT
    B
    REGISTERS
    6.5
    P
    ORT
    C
    6.6
    P
    ORT
    C
    REGISTERS
    6.7
    P
    ORT
    D
    6.8
    P
    ORT
    D
    REGISTERS
    7
    BUZZER
    7.1
    B
    UZZER
    R
    EGISTER
    8
    TIMER/EVENT COUNTER
    8.1
    T
    IMER
    /C
    OUNTER REGISTERS
    9
    INTERRUPT CONTROLLER
    9.1
    I
    NTERRUPT CONTROL REGISTERS
    10
    10.1
    11
    11.1
    11.2
    12
    13
    14
    15
    15
    16
    16.1
    16.2
    16.3
    16.4
    16.5
    16.6
    16.7
    16.8
    17
    18
    18.1
    18.2
    18.3
    19
    PERIPHERAL MEMORY MAP
    ELECTRICAL SPECIFICATIONS
    A
    BSOLUTE MAXIMUM RATINGS
    S
    TANDARD
    O
    PERATING
    C
    ONDITIONS
    H
    ANDLING
    P
    ROCEDURES
    DC
    CHARACTERISTICS
    - P
    OWER
    S
    UPPLY
    P
    INS
    DC
    CHARACTERISTICS
    - I
    NPUT
    /O
    UTPUT
    P
    INS
    DC
    CHARACTERISTICS
    - S
    UPPLY
    V
    OLTAGE
    D
    ETECTOR
    L
    EVELS
    O
    SCILLATOR
    I
    NPUT
    T
    IMING CHARACTERISTICS
    PAD LOCATION DIAGRAM
    PACKAGE AND ORDERING INFORMATION
    O
    RDERING
    I
    NFORMATION
    P
    ACKAGE
    M
    ARKING
    C
    USTOMER
    M
    ARKING
    SPECIFICATION CHANGE
    SUPPLY VOLTAGE LEVEL DETECTOR (SVLD)
    SVLD
    REGISTER
    SERIAL (OUTPUT) WRITE BUFFER – SWB
    SWB A
    UTOMATIC SEND MODE
    SWB I
    NTERACTIVE SEND MODE
    STROBE / RESET OUTPUT
    5
    5
    5
    5
    6
    6
    6
    7
    7
    7
    8
    8
    8
    9
    9
    10
    11
    11
    12
    12
    14
    14
    15
    15
    16
    17
    18
    18
    20
    20
    21
    23
    25
    26
    Table of Figures
    Figure 1.Architecture
    Figure 2.Pin Configuration
    Figure 3.Typical Configuration
    Figure 4.Mode Transition diagram
    Figure 5.System reset generation
    Figure 6.Port A
    Figure 7.Port B
    Figure 8.Port C
    Figure 9.Port D
    Figure 10.Timer / Event Counter
    Figure 11.Interrupt Request generation
    Figure 12.Serial write buffer
    Figure 13.Automatic Serial Write Buffer transmission
    Figure 14.Interactive Serial Write Buffer transmission
    Figure 15. EM6603 PAD Location Diagram
    Figure 16. Dimensions of PDIP24 Pack. - Pack. type “A”
    Figure 17. Dimensions of TSSOP24 Pack. - Pack. type “F”
    Figure 18. Dimensions of SOP24 Pack. SOIC – Pack. type “B”
    1
    1
    4
    5
    6
    10
    11
    13
    14
    16
    19
    22
    23
    25
    34
    34
    35
    35
    Table of Tables
    Table 1. Pin Description
    Table 2.StandBy and Sleep Activities
    Table 3. PortA Inputs RESET options (metal Hardware option)
    Table 4. Watchdog-Timer Option (software option)
    Table 5. Initial Value After RESET
    Table 6.Prescaler interrupt source
    Table 7. Prescaler control register - PRESC
    Table 8.Watchdog register - WD
    Table 9.Input / Output Ports Overview
    Table 10.Option register - Option
    Table 11.PortA input status register - PortA
    Table 12.PortA Interrupt request register - IRQpA
    Table 13.PortA interrupt mask register - MportA
    Table 14.PortB input status register - PortB
    Table 15.PortB Input/Output control register - CIOportB
    Table 16.Ports A&C Interrupt Request
    Table 17.PortC input/output register - PortC
    Table 18.PortC Interrupt request register - IRQpC
    Table 19.PortC interrupt mask register - MportC
    Table 20.PortD Input/Output register - PortD
    Table 21.Ports control register - CPIOB
    Table 22.Buzzer frequency selection
    Table 23.Buzzer control register - BEEP
    Table 24.Timer Clock Selection
    Table 25.Timer control register - TimCtr
    Table 26.LOW Timer Load/Status register -LTimLS (4 low bits)
    Table 27.HIGH Timer Load/Status register-HTimLS (4 high bits)
    Table 28.PA3 counter input selection register - PA3cnt
    Table 29.PA3 counter input selection
    Table 30.Main Interrupt request register - IntRq (Read Only)*
    Table 31.register - CIRQD
    Table 32. SVLD level selection
    Table 33.SVLD control register - SVLD
    Table 34.SWB clock selection
    Table 35.SWB clock selection register - ClkSWB
    Table 36.PortD status
    Table 37.SWB buffer register - SWbuff
    Table 38.SWB Low size register - LowSWB
    Table 39.SWB High size register - HighSWB
    Table 40 Input/Output Ports
    Table 41 PortA RESET option
    Table 42 SVLD levels
    4
    5
    7
    7
    7
    8
    8
    8
    9
    9
    10
    10
    10
    11
    11
    12
    12
    12
    12
    14
    14
    15
    15
    17
    17
    17
    17
    17
    17
    18
    19
    20
    20
    21
    21
    21
    22
    22
    22
    27
    27
    27
    TEST AT EM - ACTIVE SUPPLY CURRENT TEST 26
    METAL MASK OPTIONS
    27
    28
    28
    30
    30
    30
    30
    30
    31
    32
    33
    33
    34
    34
    36
    36
    36
    37
    03/02 REV. G/439
    Copyright
    2002, EM Microelectronic-Marin SA
    3
    www.emmicroelectronic.com

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